1. Field of the Invention
The invention relates to a characteristic monitoring device on a chip. More particularly, the invention relates to the field of monitoring parameters of chips by measuring signal's delays.
2. Description of the Related Art
Conventional on-chip test circuits are used for testing parameters of chips, for example, utilizing a string of logic gates to test input levels Vil-Vih, output levels Vol-Voh, and connectivities of pads. FIG. 8 shows a diagram of conventional strings of logic gates. A pulse signal sequence propagates through input pads I1-I4 in order, changing one pin low at a time, and then going back high, in reverse order, changing one pin at a time. Delayed by the NAND gates 1-2-3-4, the NANDout outputs the pulse signal sequence. The input levels Vil and Vih can be measured at the input pads I1-I2-I3-I4. The output level Vol and Voh can be measured at the output node NANDout.
The other characteristics of chips cannot be obtained by conventional strings of logic gates. There is a need for adding pads or changing test circuit structure for measuring the other characteristics. Under the condition without changing test circuit structure and adding too many pins overhead, a need therefore exists for a test circuit capable of measuring parameters of chips mentioned above and the other characteristics of chips.